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Dr. C. L. David Liu
Recipient of 2011 Phil Kaufman Award
Award Presenter:
Jason Cong
Chancellor’s Professor, UCLA
Director, Center for Domain-Specific Computing
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Presentation Challenge #1
Year
Recipient
Presenter
2010
Pat Pistilli
Al Dunlop
2009
Randal E. Bryant
Rob A. Rutenbar
2008
Aart de Geus
Kurt Keutzer
2007
Robert K. Brayton
Alberto Sangiovanni-Vincentelli
2006
Robert Dutton
Walden C. Rhines
2005
Phil Moorby
Richard Newton
2004
Joseph Costello
Richard Newton
2003
Richard Newton
Aart de Geus
2002
Ronald A. Rohrer
Richard Newton
2001
Alberto Sangiovanni-Vincentelli
Richard Newton
▪  Dave was my PhD advisor
▪  Dave is a great speaker, with high expectations that his students
will also be great speakers
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Presentation Challenge #2
The question that Rob Rutenbar and I asked at the beginning of Dave’s
nomination form –
How many EDA pioneers have been:
1.  On the board of a major silicon foundry?
2.  and on the board of several major fabless semiconductor companies?
3.  and the president of a prominent, international research university?
4.  and the PhD advisor for a Turing Award winner?
5.  and has his own radio talk show?
6.  and …
The answer is: Exactly one – C. L. (Dave) Liu.
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Dave Liu
Transforming Ad Hoc EDA to Algorithmic EDA
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Dave’s First DAC Paper – 1982 DAC in Las Vegas
▪  J. R. Egan and C. L. Liu
“Optimal Bipartite Folding of
PLA”
pp. 141-146, 1982 DAC
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Backdrop: IC Industry in 1981
▪  IBM introduced its PC
–  Ran on a 4.77 MHz Intel 8088 microprocessor and
–  Used Microsoft’s MS-DOS operating system.
▪  Apollo Computer unveiled the first workstation, its DN100
–  Offered more power than some minicomputers at a fraction of the price
–  With good support of computer-intensive graphics programs common in engineering
▪  Design complexity: Intel 8088
–  16-bit internal bus
–  8-bit external bus
–  Transistor count: 29,000
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Backdrop: EDA in 1981
▪  Commonly used physical design methods
–  Circuit partitioning
▪  Iterative refinement (pairwise exchanges)
–  Circuit placement
▪  Greedy construction
▪  Min-cut based placement
–  PCB routing
▪  Line probe + maze routing
–  IC routing
▪  Channel routing
▪  Dave brought a great deal of combinatorial optimization techniques
and experiences to EDA, with rigor, elegance, and much better
efficiency
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A Classical Example: Automatic Floorplan Design
▪  Best paper award at 1986 DAC
▪  Pioneering work in floorplan design
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